Designed to scale
BrainScaleS is based on single-chip building blocks — its predecessor generation already proved the architecture at wafer scale, with a corresponding energy-efficiency payoff.
BrainScaleS-1 wafer-scale module: 384 chips on a wafer are interconnected per on-wafer circuit-switched networking.
The BrainScaleS-2 multi-chip system: 12 interconnected chips per backplane
BrainScaleS-2 rack installation
4×8 mm²
size of one chip die
512
physical AdEx neurons circuits per chip — modeled on biological neurons, supporting multi-compartment functionality, functioning as the compute units of a time-continuous analog spiking neural network
1 000
typical (configurable) acceleration factor between biological time and on-chip dynamics
131 072
physical on-chip synapses (current and conductance-based operation modes) with built-in plasticity — trainable in-memory weights but inspired by how biological synapses adapt
12
interconnected chips per backplane in the BrainScaleS-2 multi-chip system
2
backplanes per BrainScales-2 rack case
120
chips per 19" rack for the BrainScales-2 multi-chip system
20 cm
diameter of a BrainScaleS-1 wafer providing inter-chip connectivity by a on-wafer circuit-switched network
384
chips per BrainScaleS-1 silicon wafer
20
BrainScaleS-1 modules in 5 standard 19" racks provided the BrainScaleS-1 installation within the Human Brain Project
3
top-level APIs for BrainScaleS-2 — ML-inspired training using hxtorch (PyTorch) and jaxsnn (JAX), and neuroscientific applications using PyNN.
The entire software stack is packaged and distributed via the EBRAINS Software Distribution for seamless integration and deployment.
